plumCore DAQ framework
1. Introduction
2. Concepts and design goals
3. Getting started
4. plumCore microkernel documentation
5. Services
5.1. Low level device drivers
5.1.1. STM32 12 bit SAR ADC driver
5.1.2. STM32 DAC driver
5.1.3. STM32G4 FDCAN peripheral driver
5.1.4. STM32 I2C peripheral driver
5.1.5. STM32L4 low-power MCU family power manager
5.1.5.1. Dependencies
5.1.6. STM32 QSPI flash memory driver
5.1.7. STM32 RTC peripheral clock driver
5.1.8. STM32 SPI peripheral driver
5.1.9. System clock implemented using STM32 timer
5.1.10. Capacitive sensing implemented using STM32 timer
5.1.11. STM32 UART driver
5.1.12. STM32 watchdog peripheral driver
5.2. High level (second level) device drivers
5.3. DAQ and data processing services
5.4. Volume and filesystem access
5.5. Communication protocols
5.6. Communication server/clients
5.7. User interface services
5.8. Generic system services
6. Interfaces
7. Applications
8. Applets
9. nwDAQ CAN communication protocol (nbus)
10. Ports
11. Conceptual
12. Code structure, contributing
13. Coding style guide
14. Enhancement proposals
plumCore DAQ framework
5.
Services
5.1.5.
STM32L4 low-power MCU family power manager
5.1.5.
STM32L4 low-power MCU family power manager
5.1.5.1.
Dependencies
LSE oscillator is mandatory at 32.768 kHz.